19:56

Caselet DI | Question solving | Reasoning | Part - 17 | Bharath Kumar

24:46

Caselet DI | Solving Examples | Reasoning | Part - 16 | Bharath Kumar

22:27

Caselet DI | Problem solving | Reasoning | Part - 15 | Bharath Kumar

27:02

Caselet DI | Examples solving | Reasoning | Part - 14 | Bharath Kumar

25:28

Caselet DI | Question solved | Reasoning | Part - 13 | Bharath Kumar

18:07

Caselet DI | Solving Questions | Reasoning | Part - 12 | Bharath Kumar

23:51

Caselet DI | problems solved | Reasoning | Part - 11 | Bharath Kumar

16:42

Caselet DI | Solving problems | Reasoning | Part - 10 | Bharath Kumar

19:41

Caselet DI | Solving Examples | Reasoning | Part - 09 | Bharath Kumar

18:35

Caselet DI | Examples | Juicers | Reasoning | Part - 08 | Bharath Kumar

13:23

Pass transistor | Circuits | Basic principles | VHDL | Digital Systems Design | Lec-128

11:15

D latch implementation | VHDL | Digital Systems Design | Lec-127

12:22

Clocked JK latch | Logic Diagram | Digital Systems Design | Lec-126

12:24

Clocked SR latch | NAND | NOR | Digital Systems Design | Lec-125

13:31

SR Latch using NAND gates | Digital Systems Design | Lec-124

12:37

SR Latch using NOR gates | Digital Systems Design | Lec-123

12:53

Bistable elements | Behaviour | Digital Systems Design | Lec-122

12:00

Sequential MOS Logic | Circuit | Digital Systems Design | Lec-121

13:33

Pass transistor logic | Digital Systems Design | Lec-120

11:32

CMOS transmission gates | DC analysis | Part-2/2 | Digital Systems Design | Lec-119

16:59

CMOS transmission gates | DC analysis | Part-1/2 | Digital Systems Design | Lec-118

12:56

CMOS transmission gates | Introduction | Digital Systems Design | Lec-117

12:32

Pseudo NMOS logic gate | Digital Systems Design | Lec-116

11:14

CMOS OAI logic circuit | Digital Systems Design | Lec-115

11:19

CMOS AOI logic circuit | Digital Systems Design | Lec-114

12:24

CMOS Complex logic circuit | Digital Systems Design | Lec-113

11:28

Complex logic circuit | Digital Systems Design | Lec-112

10:53

CMOS 2 input NOR gate | Digital Systems Design | Lec-111

11:22

CMOS 2 input NAND gate | Digital Systems Design | Lec-110

10:19

NMOS NAND gate | Transient analysis | Digital Systems Design | Lec-109

10:56

NMOS NAND gate | Generalised | Digital Systems Design | Lec-108

13:27

2 input NOR gate | Transient analysis | Digital Systems Design | Lec-107

10:47

NOR structure with multiple inputs | Generalised | Digital Systems Design | Lec-106

13:55

CMOS inverter | 2 input NOR gate | Digital Systems Design | Lec-105

15:15

Combinational logic circuits | MOS devices | Digital Systems Design | Lec-104

12:40

Decade counter | IC7490 | VHDL code | IC 7490 | VHDL | Digital Systems Design | Lec-103

08:48

VHDL Code for 4-bit Down / Up counter | IC 7493 | VHDL | Digital Systems Design | Lec-102

08:11

Counter | 4-bit Down / Up counter | IC7493 | Logic Diagram | VHDL | Digital Systems Design | Lec-101

10:49

VHDL Code for Mod 8 Counter | VHDL | Digital Systems Design | Lec-100

16:16

Design of Mod 16 Synchronous Counter | T- FF | VHDL | Digital Systems Design | Lec-99

10:58

Synchronous Counter | Design of N bit | Steps | Digital Systems Design | Lec-98

10:13

VHDL code for Johnson Counter | Digital Systems Design | Lec-97

12:02

Johnson Counter | State diagram & Sequence table | Digital Systems Design | Lec-96

11:19

VHDL code for Ring Counters | behavioral | Digital Systems Design | Lec-95

08:24

Ring Counters | State diagram & Sequence table | Digital Systems Design | Lec-94

14:50

Counters | Types & Comparison | Digital Systems Design | Lec-93

12:43

Universal shift register | IC74LS194 | behavioral model VHDL code | Digital Systems Design | Lec-92

17:46

Universal shift register | IC74LS194 | Truth table | Digital Systems Design | Lec-91

10:32

Registers | PISO VHDL code | behavioral model | Digital Systems Design | Lec-90

12:20

Registers | 4-bit PISO | Diagram | Digital Systems Design | Lec-89

10:25

Registers | 4-bit PIPO VHDL code | Digital Systems Design | Lec-88

11:08

shift Registers | SIPO | VHDL code behavioral model | Digital Systems Design | Lec-87

13:05

shift Registers | SISO | VHDL Behavioral Model | Digital Systems Design | Lec-86

13:40

Registers | SISO | VHDL Structural model | Digital Systems Design | Lec-85

12:46

Registers SISO | Introduction & Types | Digital Systems Design | Lec-84

11:06

VHDL code for D Flipflop | IC 7474 | Digital Systems Design | Lec-83

16:50

D Flipflop | logic diagram | Digital Systems Design | Lec-82

11:37

VHDL code for T Flip flop | Behavioral model | Digital Systems Design | Lec-81

10:25

T Flip flop | Truth table & Diagram | Digital Systems Design | Lec-80

14:38

VHDL code for JK Flip flop | behavioural model | Digital Systems Design | Lec-79